Design of a Random-Pulse Computer for Classifying Binary Patterns

This paper proposes a novel design for a parallel nonadaptive binary pattern classifier. The structure employs randompulse (stochastic) computing elements to economically realize multimodal nonlinear discriminant functions similar in form to those used in potential function classifiers. The technique achieves efficient hardware utilization by employing a READ-ONLY memory (ROM) without addressing circuits to store modes and simultaneously execute parallel stochastic multiplications required in discriminant function computations. The proposed machine is a hybrid structure that uses stochastic computing elements for multiplication and analog elements to calculate a weighted sum. The two technologies are combined in a manner that employs each where it has the greater comparative advantage.